Mmu Lock/Protect Entry Register (Lock_Reg); Mmu Read/Write Tlb Entry Register (Ld_Tlb_Reg) - Texas Instruments OMAP5910 Reference Manual

Table 31. MMU Lock/Protect Entry Register (LOCK_REG) Field Descriptions
Bits Field
31−15 Reserved
14−10 BASE_VALUE
9 Reserved
8−4 CURRENT_VICTIM
3−0 Reserved
6.5.10

MMU Read/Write TLB Entry Register (LD_TLB_REG)

Figure 56. MMU Read/Write TLB Entry Register (LD_TLB_REG)
31
Note: R = Read; W = Write; −n = Value after reset; −x = Value after reset is not defined.
SPRU890A
Value Description
These bits are not used. Always write 0 to these bits.
0−31 TLB lock base pointer. The value, n, that is written to these bits locks
the first n TLB entries. Entries 0 to n-1 will not be evicted by the table
walking logic when the TLB becomes full. Notice that n must be less
than or equal to 31; that is, at least one entry must always be
unprotected in the TLB.
This bit is not used.
0−31 TLB victim pointer. This field displays the entry number currently
selected by the victim pointer. The victim pointer identifies the TLB
entry which is next to be overwritten by the table walking logic. The
victim pointer is also used when reading or writing TLB entries.
These bits are not used. Always write 0 to these bits.
The Read/Write TLB Entry Register is used to read or write entries from or to
the TLB. The victim pointer (set through the Lock/Protect Entry Register)
selects the entry to be read or written.
When the WRITE_ENTRY bit is set, the values in the CAM Entry Registers and
the RAM Entry Registers are written to the entry pointed to by the TLB.
When the READ_ENTRY bit is set, the TLB entry CAM and RAM values are
copied to the CAM Entry Read Registers and the RAM Entry Read Registers.
Note:
LD_TLB_REG can only be modified by the MPU core when the table walking
logic is disabled.
Reserved
R-0
DSP Memory Management Unit
2 1
READ_ WRITE_
ENTRY
RW-0
DSP Subsystem
0
ENTRY
RW-0
111