Table of Contents
Advertisement
www.ti.com
4.1 Device Configuration
The configuration options are configured via the following Operation Configuration A and Operation
Configuration B data memory registers. These registers are programmed and read via the methods described
in
Section
3.1, Accessing the Data Memory.
4.1.1 CEDV Smoothing Config Register
Bit 7
RSVD
0
Default
RSVD = Reserved
SMOOTHEOC_EN = Allows smoothing of Remcap once Current starts decreasing during the end of charge (EOC).
0 = End of charge smoothing is not enabled.
1 (default) = End of charge smoothing is enabled.
SMEXT = When set to 1, smoothing continues to EDV1 and EDV0 points. When set to 0, smoothing stops at EDV2.
VAVG = Enables smoothing to use average voltage
SMEN = Smoothing result is reported on RemainingCapacity().
4.1.2 Operation Configuration A (Operation Config A) Register
Bit 7
High Byte
TEMPS
0
Default
Low Byte
BIEnable
1
Default
High Byte
SLUUBD4A – APRIL 2016 – REVISED NOVEMBER 2022
Submit Document Feedback
Table 4-1. CEDV Smoothing Config Register Bit Definition
Bit 6
Bit 5
RSVD
RSVD
0
0
Default is 0.
When set to 1, smoothing uses average voltage. When set to 0 smoothing uses measured voltage. Default is
0.
When set to 1, the smoothing result is reported on RemainingCapacity(). When set to 0, the normal CEDV
remaining capacity is reported. Default is 0.
Table 4-2. Operation Config A Register Bit Definition
Bit 6
Bit 5
RSVD
BATG_POL
0
0
BI_PUP
RSVD
_EN
0
0
TEMPS = When set to 1, the external thermistor is selected for Temperature() measurements.
RSVD = Reserved. Do not use.
Copyright © 2022 Texas Instruments Incorporated
Functional Description
Bit 4
Bit 3
SMOOTH
RSVD
EOC_EN
0
0
0x00
Bit 4
Bit 3
BATG_EN
RSVD
0
0
0x04
PFC_CFG1
PFC_CFG0
0
0
0x04
Functional Description
Chapter 4
Bit 2
Bit 1
SMEXT
VAVG
0
0
Bit 2
Bit 1
SLPWAKECH
SLEEP
G
1
0
WAKE_EN
WK_TH1
1
0
BQ27220
Bit 0
SMEN
0
Bit 0
WRTEMP
0
WK_TH0
0
45
Advertisement
Table of Contents
