How Is Sequence Mode Implemented - AVT Pike Technical Manual

Controlling image capture
Register Name
0xF1000220 SEQUENCE_CTRL
0xF1000224 SEQUENCE_PARAM ---
Note Sequence mode requires not only firmware 3.x but also spe-
cial care if changing image size, Color_Coding_ID and frame
rate related parameters. This is because these changes not
only affect settings in the camera but also require corre-
sponding settings in the receiving software in the PC.
Caution Incorrect handling may lead to image corruption or loss of
subsequent images.
Please ask for detailed support when you want to use this
feature.

How is sequence mode implemented?

There is a FIFO (first in first out) memory for each of the IIDC V1.31 registers
listed above. The depth of each FIFO is fixed to 32(dez) complete sets. Func-
tionality is controlled by the following advanced registers.
Field
Presence_Inq
---
AutoRewind
ON_OFF
SetupMode
---
MaxLength
SeqLength
ApplyParameters
---
SeqStepMode
ImageRepeat
ImageNo
Table 67: Advanced register: Sequence mode
Bit Description
[0] Indicates presence of this feature
(read only)
[1..4] Reserved
[5]
[6] Enable/disable this feature
[7] Sequence setup mode
[8..15] Reserved
[16..23] Maximum possible length of a
sequence (read only)
[24..31] Length of the sequence (32 dez for
all CCD models)
[0..4] Reserved
[5] Apply settings to selected image of
sequence; auto-reset
[6..7] Reserved
[8..15] Sequence stepping mode
[16..23] Image repeat counter
[24..31] Number of image within a sequence
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