A Summary Of Aligned And Unaligned Transfers For 16-Bit Bus - Intel 80960HA Datasheet

32-bit high-performance superscalar processor
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80960HA/HD/HT
Figure 56. A Summary of Aligned and Unaligned Transfers for 16-Bit Bus
Byte Offset
Word Offset
Short
16-Bit Bus
Word
16-Bit Bus
Double Word
16-Bit Bus
Triple Word
16-Bit Bus
Quad Word
16-Bit Bus
80
0
4
8
0
1
2
Short
Byte, Byte
Short
Byte, Byte
Two Short Burst
Byte, Short, Byte
(Short)*2
Byte, Short, Byte
Two Short Burst
Four Short Burst
12
16
20
3
4
(Byte, Short, Byte) *2
(Short) *4
(Byte, Short, Byte)*2
(Two Short Burst)*2
Four Short Burst
Four Short Burst, Two Short Burst
(Byte, Short, Byte) *3
(Short) *6
(Byte, Short, Byte) *3
(Two Short Burst) *3
(Four Short Burst)*2
(Byte, Short, Byte) *4
(Short) *8
24
5
6
(Two Short Burst) *3
(Byte, Short, Byte) *4
(Two Short Burst)*4
(Two Short Burst) *4
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