Bus Waveforms; V Diff Specification For Dual Power Supply Requirements (3.3 V, 5 V) - Intel 80960HA Datasheet

CLKIN
V VCC5,
CC,
ONCE
CT3:0, ADS,
LOCK, WAIT,
DEN, BLAST
W/R, DT/R,
BREQ, FAIL,
BSTALL
A31:2, SUP
D/C, BE3:0
D31:0,
Inputs
DP3:0
STEST
RESET
NOTE: V stable: As specified in Table 21, "VDIFF Specification for Dual Power Supply Requirements (3.3 V, 5 V)" on page 39
CC
A
Valid
Thold
Tsetup
1CLKIN
1CLKIN
CLKIN and V Stable to RESET high, RESET high to First Bus Activity,
CC
minimum 10,000 CLKIN periods HA=67, HD=34, HT=23
for PLL stabilization. CLKIN periods
B A B
Invalid