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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.9
SUBC (Subtract Word Data in Source Register and Carry
Bit from Destination Register)
Subtract the word data in "Rj" and the carry bit from the word data in "Ri", store results
to "Ri".
■ SUBC (Subtract Word Data in Source Register and Carry Bit from Destination
Register)
Assembler format:
SUBC Rj, Ri
Operation:
Ri – Rj – C → Ri
Flag change:
N :
Z :
V :
C :
Execution cycles:
1 cycle
Instruction format:
Example:
SUBC R2, R3
80
N
Z
V
C
C
C
C
C
Set when the MSB of the operation result is "1", cleared when the MSB is "0".
Set when the operation result is "0", cleared otherwise.
Set when an overflow has occurred as a result of the operation, cleared otherwise.
Set when a borrow has occurred as a result of the operation, cleared otherwise.
MSB
1
0
1
0
R2
1 2 3 4 5 6 7 8
R3
9 9 9 9 9 9 9 9
N Z V C
CCR
0 0 0 1
Before execution
1
1
0
1
Rj
LSB
Ri
R2
1 2 3 4 5 6 7 8
R3
8 7 6 5 4 3 2 0
N Z V C
CCR
1 0 0 0
After execution
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