Fujitsu FR Family Instruction Manual page 299

DIV3 (Correction when Remainder is 0) ............ 136
Reset
Initialization of CPU Internal Register Values at Reset
............................................................ 33
Reset Operations................................................ 33
Reset Priority Level............................................ 33
Restrictions
Data Restrictions on Word Alignment.................. 11
Program Restrictions on Word Alignment ............ 11
RET
RET (Return from Subroutine) .......................... 186
RET:D (Return from Subroutine) ...................... 199
RETI
RETI (Return from Interrupt) ............................ 191
Return
RET (Return from Subroutine) .......................... 186
RET:D (Return from Subroutine) ...................... 199
RETI (Return from Interrupt) ............................ 191
Return Pointer
Overview of the Return Pointer ........................... 25
Return Pointer Configuration .............................. 26
Return Pointer Functions .................................... 26
Right Direction
ASR (Arithmetic Shift to the Right Direction)
.................................................. 144, 145
ASR2 (Arithmetic Shift to the Right Direction)
.......................................................... 146
LSR (Logical Shift to the Right Direction)
.................................................. 141, 142
LSR2 (Logical Shift to the Right Direction)........ 143
S
S
Interlocking Produced by Reference to "R15" and
General-purpose Registers after Changing
the "S" Flag .......................................... 57
Save
COPSV (Save 32-bit Data from Coprocessor Register
to Register)......................................... 232
SCR
System Condition Code Register (SCR: Bit 10 to bit
08)....................................................... 20
Set
STILM (Set Immediate Data to Interrupt Level Mask
Register) ............................................ 237
Setting Up
DIV0S (Initial Setting Up for Signed Division)
.......................................................... 128
DIV0U (Initial Setting Up for Unsigned Division)
.......................................................... 130
Sign Extend
EXTSB (Sign Extend from Byte Data to Word Data)
.......................................................... 239
EXTSH (Sign Extend from Byte Data to Word Data)
..........................................................241
Signed Division
DIV0S (Initial Setting Up for Signed Division)
..........................................................128
DIV4S (Correction Answer for Signed Division)
..........................................................137
Simultaneous Occurrences
Priority of Simultaneous Occurrences ...................51
Slots
Instructions Prohibited in Delay Slots ...................58
Undefined Instructions Placed in Delay Slots ........43
Software Interrupt
INT (Software Interrupt) ...................................187
INTE (Software Interrupt for Emulator)..............189
Source Register
ADD (Add Word Data of Source Register to
Destination Register)..............................72
ADDC (Add Word Data of Source Register and Carry
Bit to Destination Register).....................75
ADDN (Add Word Data of Source Register to
Destination Register)..............................76
AND (And Word Data of Source Register to Data in
Memory)...............................................86
AND (And Word Data of Source Register to
Destination Register)..............................85
ANDB (And Byte Data of Source Register to Data in
Memory)...............................................90
ANDH (And Half-word Data of Source Register to
Data in Memory) ...................................88
CMP (Compare Immediate Data of Source Register
and Destination Register) .......................83
CMP (Compare Word Data in Source Register and
Destination Register)..............................82
EOR (Exclusive Or Word Data of Source Register to
Data in Memory) .................................100
EOR (Exclusive Or Word Data of Source Register to
Destination Register)..............................99
EORB (Exclusive Or Byte Data of Source Register to
Data in Memory) .................................104
EORH (Exclusive Or Half-word Data of Source
Register to Data in Memory).................102
MOV (Move Word Data in Source Register to
Destination Register)............178, 179, 181
MOV (Move Word Data in Source Register to
Program Status Register) ......................182
OR (Or Word Data of Source Register to Data in
Memory)...............................................93
OR (Or Word Data of Source Register to Destination
Register) ...............................................92
ORB (Or Byte Data of Source Register to Data in
Memory)...............................................97
ORH (Or Half-word Data of Source Register to Data
in Memory) ...........................................95
SUB (Subtract Word Data in Source Register from
Destination Register)..............................79
SUBC (Subtract Word Data in Source Register and
INDEX
283