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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.3
ADD2 (Add 4-bit Immediate Data to Destination Register)
Add the result of the higher 28 bits of 4-bit immediate data with minus extension to the
word data in "Ri", store results to "Ri".
The way a "C" flag of this instruction varies is the same as the ADD instruction ; it is
different from that of the SUB instruction.
■ ADD2 (Add 4-bit Immediate Data to Destination Register)
Assembler format:
ADD2 #i4, Ri
Operation:
Ri + extn(i4) → Ri
Flag change:
N :
Z :
V :
C :
Execution cycles:
1 cycle
Instruction format:
Example:
ADD2 # –2, R3
74
N
Z
V
C
C
C
C
C
Set when the MSB of the operation result is "1", cleared when the MSB is "0".
Set when the operation result is "0", cleared otherwise.
Set when an overflow has occurred as a result of the operation, cleared otherwise.
Set when a carry has occurred as a result of the operation, cleared otherwise.
MSB
1
0
1
0
Instruction bit pattern : 1010 0101 1110 0011
R3
9 9 9 9 9 9 9 9
N Z V C
CCR
0 0 0 0
Before execution
0
1
0
1
i4
LSB
Ri
R3
9 9 9 9 9 9 9 7
N Z V C
CCR
1 0 0 1
After execution
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