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INDEX
Carry Bit from Destination Register) ....... 80
SUBN (Subtract Word Data in Source Register from
Destination Register) ............................. 81
SSP
System Stack Pointer (SSP),User Stack Pointer (USP)
............................................................ 27
ST
ST (Store Word Data in Program Status Register to
Memory) ............................................ 171
ST (Store Word Data in Register to Memory)
.................. 165, 166, 167, 168, 169, 170
Stack Pointer
ADDSP (Add Stack Pointer and Immediate Data)
.......................................................... 238
Relation between "R15" and Stack Pointer............ 16
Stack Pointer Configuration ................................ 28
STB
STB (Store Byte Data in Register to Memory)
.......................................... 175, 176, 177
Step Trace Trap
Conditions for Generation of Step Trace Traps...... 47
Overview of Step Trace Traps ............................. 47
"PC" Values Saved for Step Trace Traps .............. 47
Precautionary Information for Use of Step Trace Traps
............................................................ 47
Relation of Step Trace Traps to "NMI" and External
Interrupts .............................................. 47
Step Trace Trap Operation .................................. 47
Stepwise Division Programs
Interrupts during Execution of Stepwise Division
Programs .............................................. 37
STH
STH (Store Half-word Data in Register to Memory)
.......................................... 172, 173, 174
STILM
STILM (Set Immediate Data to Interrupt Level Mask
Register)............................................. 237
STM
STM0 (Store Multiple Registers) ....................... 247
STM1 (Store Multiple Registers) ....................... 249
Store
COPST (Store 32-bit Data from Coprocessor Register
to Register) ......................................... 230
ST (Store Word Data in Program Status Register to
Memory) ............................................ 171
ST (Store Word Data in Register to Memory)
.................. 165, 166, 167, 168, 169, 170
STB (Store Byte Data in Register to Memory)
.......................................... 175, 176, 177
STH (Store Half-word Data in Register to Memory)
.......................................... 172, 173, 174
STM0 (Store Multiple Registers) ....................... 247
STM1 (Store Multiple Registers) ....................... 249
STRES (Store Word Data in Resource to Memory)
.......................................................... 225
284
STRES
STRES (Store Word Data in Resource to Memory)
......................................................... 225
SUB
SUB (Subtract Word Data in Source Register from
Destination Register)............................. 79
SUBC
SUBC (Subtract Word Data in Source Register and
Carry Bit from Destination Register)....... 80
SUBN
SUBN (Subtract Word Data in Source Register from
Destination Register)............................. 81
Subroutine
CALL (Call Subroutine) ........................... 184, 185
CALL:D (Call Subroutine) ....................... 196, 198
RET (Return from Subroutine) .......................... 186
RET:D (Return from Subroutine) ...................... 199
Subtract
SUB (Subtract Word Data in Source Register from
Destination Register)............................. 79
SUBC (Subtract Word Data in Source Register and
Carry Bit from Destination Register)....... 80
SUBN (Subtract Word Data in Source Register from
Destination Register)............................. 81
Symbols
Symbols Used in Instruction Lists ..................... 259
System Condition Code Register
System Condition Code Register (SCR: Bit 10 to bit
08)....................................................... 20
System Stack Pointer
Functions of the System Stack Pointer and User Stack
Pointer ................................................. 28
System Stack Pointer (SSP),User Stack Pointer (USP)
........................................................... 27
T
Table Base Register
Overview of the Table Base Register ................... 23
Precautions Related to the Table Base Register ..... 24
Table Base Register Configuration ...................... 24
Table Base Register Functions ............................ 24
Test
BTSTH (Test Higher 4 Bits of Byte Data in Memory)
......................................................... 119
BTSTL (Test Lower 4 Bits of Byte Data in Memory)
......................................................... 118
Trace
Conditions for Generation of Step Trace Traps ..... 47
Overview of Step Trace Traps ............................. 47
"PC" Values Saved for Step Trace Traps .............. 47
Precautionary Information for Use of Step Trace Traps
........................................................... 47
Relation of Step Trace Traps to "NMI" and External
Interrupts ............................................. 47
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