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INDEX
Interrupts .............................................. 47
EXTSB
EXTSB (Sign Extend from Byte Data to Word Data)
.......................................................... 239
EXTSH
EXTSH (Sign Extend from Byte Data to Word Data)
.......................................................... 241
EXTUB
EXTUB (Unsign Extend from Byte Data to Word
Data).................................................. 240
EXTUH
EXTUH (Unsigned Extend from Byte Data to Word
Data).................................................. 242
F
Format
"E" Format ...................................................... 272
FR Family
Features of the FR Family CPU Core ..................... 2
FR Family Register Configuration ....................... 14
Sample Configuration of an FR Family Device ....... 3
Sample Configuration of the FR Family CPU ......... 4
G
General-purpose Registers
General-purpose Registers during Execution of
"COPST/COPSV" Instructions ............... 48
Initial Value of General-purpose Registers............ 16
Interlocking Produced by Reference to "R15" and
General-purpose Registers after Changing
the "S" Flag .......................................... 57
Overview of General-purpose Registers................ 15
Special Uses of General-purpose Registers ........... 15
H
Hazards
Overview of Register Hazards ............................. 56
I
ILM
Interrupt Level Mask Register (ILM: Bit 20 to bit 16)
............................................................ 19
Immediate Data
ADD (Add 4-bit Immediate Data to Destination
Register)............................................... 73
ADDN (Add Immediate Data to Destination Register)
............................................................ 77
ADDN2 (Add Immediate Data to Destination
Register)............................................... 78
ADDSP (Add Stack Pointer and Immediate Data)238
ANDCCR (And Condition Code Register and
Immediate Data).................................. 235
BANDH (And 4-bit Immediate Data to Higher 4 Bits
278
of Byte Data in Memory) ..................... 108
BANDL (And 4-bit Immediate Data to Lower 4 Bits of
Byte Data in Memory)......................... 106
BEORH (Eor 4-bit Immediate Data to Higher 4 Bits of
Byte Data in Memory)......................... 116
BEORL (Eor 4-bit Immediate Data to Lower 4 Bits of
Byte Data in Memory)......................... 114
BORH (Or 4-bit Immediate Data to Higher 4 Bits of
Byte Data in Memory)......................... 112
BORL (Or 4-bit Immediate Data to Lower 4 Bits of
Byte Data in Memory)......................... 110
CMP (Compare Immediate Data of Source Register
and Destination Register)....................... 83
CMP2 (Compare Immediate Data and Destination
Register) .............................................. 84
ORCCR (Or Condition Code Register and Immediate
Data) ................................................. 236
STILM (Set Immediate Data to Interrupt Level Mask
Register) ............................................ 237
Initial Setting Up
DIV0S (Initial Setting Up for Signed Division)... 128
DIV0U (Initial Setting Up for Unsigned Division)
......................................................... 130
Instruction
How to Use Undefined Instruction Exceptions...... 43
"INT" Instruction Operation................................ 45
Instruction Formats ............................................ 64
Instruction Lists ............................................... 261
Instruction Map ............................................... 271
Instruction Notation Formats............................... 66
"INTE" Instruction Operation.............................. 46
Operations of Undefined Instruction Exceptions ... 43
Overview of the "INT" Instruction....................... 45
Overview of the "INTE" Instruction..................... 46
Overview of Undefined Instruction Exceptions ..... 43
"PC" Values Saved for "INT" Instruction Execution
........................................................... 45
"PC" Values Saved for "INTE" Instruction Execution
........................................................... 46
"PC" Values Saved for Undefined Instruction
Exceptions ........................................... 43
Symbols Used in Instruction Lists ..................... 259
Time to Start of Undefined Instruction Exception
Processing ............................................ 43
Instruction Lists
Instruction Lists ............................................... 261
Symbols Used in Instruction Lists ..................... 259
Instruction Map
Instruction Map ............................................... 271
Instructions
Examples of Processing Delayed Branching
Instructions .......................................... 61
Examples of Processing Non-delayed Branching
Instructions .......................................... 60
Examples of Programing Delayed Branching
Instructions .......................................... 62
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