Andb (And Byte Data Of Source Register To Data In Memory) - Fujitsu FR Family Instruction Manual

CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.17 ANDB (And Byte Data of Source Register to Data in
Memory)
Take the logical AND of the byte data at memory address "Ri" and the byte data in "Rj",
store the results to memory address corresponding to "Ri".
The CPU will not accept hold requests between the memory read operation and the
memory write operation of this request.

■ ANDB (And Byte Data of Source Register to Data in Memory)

Assembler format: ANDB Rj, @Ri
Operation: (Ri) and Rj → (Ri)
Flag change:
N:
Z:
V and C: Unchanged
Execution cycles: 1 + 2a cycles
Instruction format:
90
N Z V C
C C – –
Set when the MSB(bit 7) of the operation result is "1", cleared when the MSB is "0".
Set when the operation result is "0", cleared otherwise.
MSB
1 0 0 0 0 1 1 0 Rj
LSB
Ri