CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.97
CALL:D (Call Subroutine)
This is a branching instruction with a delay slot.
After saving the address of the next instruction after the delay slot to the "RP", branch
to the address indicated by "Ri".
■ CALL:D (Call Subroutine)
Assembler format:
CALL : D @Ri
PC + 4 → RP
Operation:
Ri → PC
Flag change:
N, Z, V, and C: Unchanged
Execution cycles:
1 cycle
Instruction format:
Example:
CALL : D @R1
LDI : 8 #1, R1
The instruction placed in the delay slot will be executed before execution of the branch destination
instruction.
The value "R1" above will vary according to the specifications of the "LDI:8" instruction placed in
the delay slot.
198
N
Z
V
C
–
–
–
–
MSB
1
0
0
1
R1
F F F F F 8 0 0
PC
8 0 0 0 F F F E
x x x x
x x x x
RP
Before execution of "CALL" instruction
1
1
1
1
0
0
; Instruction placed in delay slot
LSB
0
1
Ri
R1
0 0 0 0 0 0 0 1
PC
F F F F F 8 0 0
8 0 0 1 0 0 0 2
RP
After branching