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CHAPTER 3 REGISTER DESCRIPTIONS
■ Note on PS Register
Because of prior processing of PS register by some commands, a break may be brought in an interrupt
processing subroutine during the use of a debugger or flag display content in PS register may be changed
with the following exceptional operations. In both cases, right re-processing is designed to execute after
returned from the EIT. So, operations before and after EIT are performed conforming to the specifications.
●
By a command just before DIV0U/DIV0S commands, a) user interrupt or NMI is executed, b) step
execution is implemented, or c) a break occurs in data event or emulator menu, the following operation
may be implemented.
(1) D0 and D1 flags are changed formerly.
(2) EIT process routine (user interrupt, NMI or emulator) is executed.
(3) Returned from EIT, DIVOU/DIVOS commands are executed and D0and D1 flags are set to the same
value in "(1)".
●
When user interrupt or NMI factor exists, any of command such as ORCCR/STILM/
MOV Ri,PS is executed to allow an interruption, the following operation is executed:
(1) PS register is changed formerly.
(2) EIT process routine (user interrupt, NMI) is executed.
(3) Returned from EIT, any above command is executed and PS register is set to the same value in "(1)".
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