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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.50
ASR (Arithmetic Shift to the Right Direction)
Make an arithmetic right shift of the word data in "Ri" by "Rj" bits, store the result to
"Ri".
Only the lower 5 bits of "Rj", which designates the size of the shift, are valid and the
shift range is 0 to 31 bits.
■ ASR (Arithmetic Shift to the Right Direction)
Assembler format:
ASR Rj, Ri
Operation:
Ri > > Rj → Ri
Flag change:
N: Set when the MSB of the operation result is "1", cleared when the MSB is "0".
Z: Set when the operation result is "0", cleared otherwise.
V: Unchanged
C: Holds the bit value shifted last. Cleared when the shift amount is "0".
Execution cycles:
1 cycle
Instruction format:
Example:
ASR R2, R3
144
N
Z
V
C
C
C
–
C
MSB
1
0
1
1
R2
0 0 0 0
0 0 0 8
R3
F F 0 F F F F F
N Z V C
CCR
0 0 0 0
Before execution
1
0
1
0
Rj
LSB
Ri
R2
0 0 0 0 0 0 0 8
R3
F F F F 0 F F F
N Z V C
CCR
1 0 0 1
After execution
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