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7.95
JMP:D (Jump)
This branching instruction has a delay slot.
Branch to the address indicated by "Ri".
■ JMP:D (Jump)
Assembler format:
JMP : D @Ri
Operation:
Ri → PC
Flag change:
N, Z, V, and C: Unchanged
Execution cycles:
1 cycle
Instruction format:
Example:
JMP : D @R1
LDI : 8 #0FFH, R1
The instruction placed in the delay slot will be executed before execution of the branch destination
instruction.
The value "R1" above will vary according to the specifications of the "LDI:8" instruction placed in
the delay slot.
N
Z
V
C
–
–
–
–
MSB
1
0
0
1
R1
C 0 0 0 8 0 0 0
PC
F F 8 0 0 0 0 0
Before execution of "JMP" instruction
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
1
1
1
1
0
0
; Instruction placed in delay slot
LSB
0
0
Ri
R1
0 0 0 0 0 0 F F
PC
C 0 0 0 8 0 0 0
After branching
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