Table Base Register (Tbr) - Fujitsu FR Family Instruction Manual

32-bit microcontroller
Hide thumbs Also See for FR Family:
Table of Contents

Advertisement

3.3.3

Table Base Register (TBR)

The Table Base Register (TBR) designates the table containing the entry address for
"EIT" operations.
■ Overview of the Table Base Register
The Table Base Register (TBR) designates the table containing the entry address for "EIT" operations.
When an "EIT" condition occurs, the address of the vector reference is determined by the sum of the
contents of this register and the vector offset corresponding to the "EIT" operation.
Figure 3.3-7shows an example of the operation of the table base register.
Timer
interrupt
Note:
Figure 3.3-7 Sample of Table Base Register (TBR) Operation
Vector correspondence table
Vector no.
11
H
87654123
The process of referencing a vector table involves application of address alignment rules
for word access.
CHAPTER 3 REGISTER DESCRIPTIONS
31
Vector offset
EAddr0 EAddr1 EAddr2 EAddr3
3B8
H
Adder
+000003B8
H
H
876544DB
H
876544D8
H
EAddr0 EAddr1 EAddr2 EAddr3
87654123
Vector table
+0
+1
+2
0
PC
TBR
H
+3
23

Advertisement

Table of Contents
loading

This manual is also suitable for:

Fr series

Table of Contents