Stm0 (Store Multiple Registers) - Fujitsu FR Family Instruction Manual

7.131 STM0 (Store Multiple Registers)

The "STM0" instruction accepts registers in the range R0 to R7 as members of the
parameter "reglist" (See Table 7.131-1.) .
Registers are processed in descending numerical order.
■ STM0 (Store Multiple Registers)
Assembler format: STM0 (reglist)
Operation: The following operations are repeated according to the number of registers specified in the
parameter "reglist".
R15 – 4 → R15
Ri → (R15)
Flag change:
N, Z, V, and C: Unchanged
Execution cycles: If "n" is the number of registers specified in the parameter "reglist", the execution cycles
required are as follows.
a × n + 1 cycle
Instruction format:
Table 7.131-1 Bit Values and Register Numbers for "reglist" (STM0)
N Z V C
– – – –
MSB
1 0 0 0
Bit Register Bit
7 R0
6 R1
5 R2
4 R3
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
1 1 1 0
Register
3 R4
2 R5
1 R6
0 R7
LSB
reglist
247