Standby Status; Halt Status; Sleep Status - Epson S1C63000 Core Cpu Manual

3.6 Standby Status

The S1C63000 has a function that stops the CPU operation and it can greatly reduce power consumption.
This function should be used to stop the CPU when there is no processing to be executed in the CPU,
example while the application program waits an interrupt. This is a standby status where the CPU has
been stopped to shift it to low power consumption.
This status is available in two types, a HALT status and a SLEEP status.

3.6.1 HALT status

The HALT status is the status in which only the CPU stops and shifting to it can be done using the HALT
instruction. The HALT status is released by a hardware interrupt including NMI, and the program
sequence returns to the step immediately after the HALT instruction by the RETI instruction in the
interrupt service routine. The peripheral circuits including the oscillation circuit and timer operate all
through the HALT status. Moreover during HALT status, the contents of the registers in the CPU that
have been set before shifting are maintained.
Figure 3.6.1.1 shows the sequence of shifting to the HALT status and restarting.
In the HALT status the Th1 and Th2 states are continuously inserted. During this period, interrupt
sampling is done at the falling edge of the Th2 state and the generation of an interrupt factor causes it to
shift to the interrupt processing.
CLK
PK
PL
PC
FETCH
DBS1/0
STOP
IRQ
IACK

3.6.2 SLEEP status

The SLEEP status is the status in which the CPU and the peripheral circuits within the MCU stop operat-
ing and shifting it can be done using the SLP instruction.
The SLEEP status is released by a reset or a specific interrupt (it differs depending on the model). When
the SLEEP status is released by a reset, the program restarts from the program start address (0110H).
When it is released by an interrupt, the program sequence returns to the step immediately after the SLP
instruction by the RETI instruction in the interrupt service routine.
Power consumption in the SLEEP status can be greatly reduced in comparison with the the HALT status,
because such peripheral circuits as the oscillation circuit are also stopped. However, since stabilization
time is needed for the oscillation circuit when restarting, it is effective when used for extended standby
where instantaneous restarting is not necessary.
S1C63000 CORE CPU MANUAL
Th1 Th1 Th1
T1 T2 T3 T4 Th2 Th2 Th2
pc
HALT
ANY
HALT status
Fig. 3.6.1.1 Sequence of shifting to HALT status and restarting
Th1 Th1 Th1
Th2 Th2 Th2 T1T2 T3 T4
pc+1
0
Interrupt sampling
EPSON
CHAPTER 3: CPU OPERATION
DUMMY
2
Interrupt processing
31