Epson S1C63000 Core Cpu Manual page 126

CHAPTER 4: INSTRUCTION SET
RETS
Function: PC ([SP1*4+3]~[SP1*4]), SP1
After executing the RET instruction, increments the PC to skip 1 instruction immediately after
the return.
Code:
Mnemonic
RETS
E I
Flags:
–
RL %r
Function: C 3 2 1 0
Rotates the content of the r register (A or B) including the carry (C) to the left for 1 bit. The
content of the C flag moves to bit 0 of the r register and bit 3 moves to the C flag.
Code:
Mnemonic
RL %A
RL %B
E I
Flags:
–
Register direct
Mode:
Extended addressing: Invalid
120
Return and skip
SP1 +1, PC
MSB
1 1 1 1 1 1 1 1 1 1 0 1 1
C Z
– –
Rotate left r reg. with carry
r
MSB
1 0 0 0 0 1 1 1 1 0 0 1 0
1 0 0 0 0 1 1 1 1 0 1 1 0
C Z
EPSON
PC + 1
LSB
1FFBH
LSB
10F2H
10F6H
S1C63000 CORE CPU MANUAL
2 cycles
1 cycle