Adc [%Ir],%R - Epson S1C63000 Core Cpu Manual

Seiko epson s1c63000 cmos 4-bit single chip microcomputer core cpu manual
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ADC [%ir],%r

Function: [ir]
[ir] + r + C
Adds the content of the r register (A or B) and carry (C) to the data memory addressed by the ir
register (X or Y).
Code:
Mnemonic
ADC [%X],%A
ADC [%X],%B
ADC [%Y],%A
ADC [%Y],%B
Flags:
E
I
Src: Register direct
Mode:
Dst: Register indirect
Extended addressing: Valid
Extended LDB
%EXT,imm8
operation: ADC [%X],%r
LDB
%EXT,imm8
ADC [%Y],%r
ADC [%ir]+,%r
Function: [ir]
[ir] + r + C, ir
Adds the content of the r register (A or B) and carry (C) to the data memory addressed by the ir
register (X or Y). Then increments the ir register (X or Y). The flags change due to the operation
result of the data memory and the increment result of the ir register does not affect the flags.
Code:
Mnemonic
ADC [%X]+,%A
ADC [%X]+,%B
ADC [%Y]+,%A
ADC [%Y]+,%B
Flags:
E
I
Src: Register direct
Mode:
Dst: Register indirect
Extended addressing: Invalid
S1C63000 CORE CPU MANUAL
Add with carry r reg. to location [ir reg.]
MSB
1 1 0 0 1 1 1 1 0 1 0 0 0
1 1 0 0 1 1 1 1 0 1 1 0 0
1 1 0 0 1 1 1 1 0 1 0 1 0
1 1 0 0 1 1 1 1 0 1 1 1 0
C
Z
[00imm8]
[00imm8] + r + C (00imm8 = 0000H + 00H to FFH)
[FFimm8]
[FFimm8] + r + C (FFimm8 = FF00H + 00H to FFH)
Add with carry r reg. to location [ir reg.] and increment ir reg.
ir + 1
MSB
1 1 0 0 1 1 1 1 0 1 0 0 1
1 1 0 0 1 1 1 1 0 1 1 0 1
1 1 0 0 1 1 1 1 0 1 0 1 1
1 1 0 0 1 1 1 1 0 1 1 1 1
C
Z
EPSON
CHAPTER 4: INSTRUCTION SET
LSB
19E8H
19ECH
19EAH
19EEH
LSB
19E9H
19EDH
19EBH
19EFH
2 cycles
2 cycles
63

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