Epson S1C63000 Core Cpu Manual page 127

Seiko epson s1c63000 cmos 4-bit single chip microcomputer core cpu manual
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RL [%ir]
Function:
C
3 2 1 0
Rotates the content of the data memory addressed by the ir register (X or Y) including the carry
(C) to the left for 1 bit. The content of the C flag moves to bit 0 of the data memory and bit 3
moves to the C flag.
Code:
Mnemonic
RL [%X]
RL [%Y]
E
I
Flags:
Register indirect
Mode:
Extended addressing: Valid
Extended LDB
%EXT,imm8
operation: RL
[%X]
LDB
%EXT,imm8
RL
[%Y]
RL [%ir]+
Function:
C
3 2 1 0
Rotates the content of the data memory addressed by the ir register (X or Y) including the carry
(C) to the left for 1 bit. The content of the C flag moves to bit 0 of the data memory and bit 3
moves to the C flag. Then increments the ir register (X or Y). The increment result of the ir
register does not affect the flags.
Code:
Mnemonic
RL [%X]+
RL [%Y]+
E
I
Flags:
Register indirect
Mode:
Extended addressing: Invalid
S1C63000 CORE CPU MANUAL
Rotate left location [ir reg.] with carry
[ir]
MSB
1 0 0 0 0 1 1 1 0 1 0 0 0
1 0 0 0 0 1 1 1 0 1 0 1 0
C
Z
Rotates the content of [00imm8] (00imm8 = 0000H + 00H to FFH)
Rotates the content of [FFimm8] (FFimm8 = FF00H + 00H to FFH)
Rotate left location [ir reg.] with carry and increment ir reg.
, ir
ir +1
[ir]
MSB
1 0 0 0 0 1 1 1 0 1 0 0 1
1 0 0 0 0 1 1 1 0 1 0 1 1
C
Z
EPSON
CHAPTER 4: INSTRUCTION SET
LSB
10E8H
10EAH
LSB
10E9H
10EBH
2 cycles
2 cycles
121

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