Epson S1C63000 Core Cpu Manual page 80

Seiko epson s1c63000 cmos 4-bit single chip microcomputer core cpu manual
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CHAPTER 4: INSTRUCTION SET
AND %r,imm4
Function: r
r
imm4
Performs a logical AND operation of the 4-bit immediate data imm4 and the content of the r
register (A or B), and stores the result in the r register.
Code:
Mnemonic
AND %A,imm4
AND %B,imm4
Flags:
E
I
Src: Immediate data
Mode:
Dst: Register direct
Extended addressing: Invalid
AND %F,imm4
Function: F
F
imm4
Performs a logical AND operation of the 4-bit immediate data imm4 and the content of the F
(flag) register, and stores the result in the r register. It is possible to reset any flag.
Code:
Mnemonic
AND %F,imm4
Flags:
E
I
Src: Immediate data
Mode:
Dst: Register direct
Extended addressing: Invalid
74
Logical AND of immediate data imm4 and r reg.
MSB
1 1 0 1 0 0 1 0 0 i3 i2 i1 i0 1A40H–1A4FH
1 1 0 1 0 0 1 0 1 i3 i2 i1 i0 1A50H–1A5FH
C
Z
Logical AND of immediate data imm4 and F reg.
MSB
1 0 0 0 0 1 0 0 0 i3 i2 i1 i0 1080H–108FH
C
Z
EPSON
LSB
LSB
S1C63000 CORE CPU MANUAL
1 cycle
1 cycle

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