Epson S1C63000 Core Cpu Manual page 15

The EXT register maintains the data set previously until new data is written or an initial reset. In other
words, the content of the EXT register becomes valid by only setting the E flag using an above instruc-
tion without the register writing and is used for an extended addressing. However, the EXT register is
undefined at an initial reset, therefore, do not directly set the E flag except when the content of the
EXT register has been set for certain.
The following shows the other instructions related to flag data transfer.
LD %A,%F
PUSH %F
POP %F
RETI
The RETI instruction is used to return from interrupt processing routines (including software inter-
rupts), and returns the F register data that was evacuated when the interrupt was generated.
If an interrupt (including NMI) is generated while fetching an instruction, such as a "LDB %EXT, ••"
instruction or an instruction which writes data to the flag register (the E flag may be set), the interrupt
is accepted after fetching (and executing) the next instruction. In normal processing, data extension
processing is not performed after returning from the interrupt service routine because the interrupt
processing including the F register evacuation is performed after the data extension has finished (E
flag is reset). However, if the stack data in the memory is directly changed in the interrupt service
routine, the F register in which the E flag is set may return. In this case, the instruction immediately
after returning by the RETI instruction is executed in the extended addressing mode by the E flag set
to "1". Pay attention to the F register setting except when consciously describing such a processing. It
is necessary to pay the same attention when returning the F register using the "POP %F" instruction.
(2) Extension with E flag
The following explains the instructions that can be executed when the E flag is set to "1" and its
operation.
• Modifying the indirect addressing with the X and Y registers (for 4-bit data access)
The indirect addressing instructions, which contain [%X] or [%Y] as an operand and accesses 4-bit
data using the X or Y register, functions as an absolute addressing that uses the EXT register data
together with the E flag (= "1").
When an 8-bit immediate data (imm8) is written to the EXT register and the E flag is set immediately
before these instructions, the instruction is modified executing as [%X] = [0000H + imm8] or [%Y] =
[FF00H + imm8]. Therefore, the addressable space with this function is data memory address from
0000H to 00FFH when [%X] is used, and from FF00H to FFFFH when [%Y] is used. Generally, data
that are often used are allocated to the data memory from 0000H to 00FFH and the area from FF00H to
FFFFH is assigned to the I/O memory area (for peripheral circuit control), so these areas are fre-
quently accessed. To access these areas by a normal indirect addressing (if the E flag has not been set)
using the X or Y register, two or three steps of instructions are necessary for setting an address data. In
other words, using this function promotes efficiency of the entire program. See Section 2.3, "Data
Memory" for details of the data memory.
Examples:
LDB %EXT,0x37
LD %A,[%X]
LDB %EXT,0x9C
ADD [%Y],5
Note: This function can be used by only the specific instructions which permits the extended addressing
(see "Instruction List"). Be aware that the operation cannot be guaranteed if the instructions
indicated below are used.
1.Instructions which have a source and /or a destination operand with the post-increment function,
[%X]+ and [%Y]+.
2.Instructions which have [%X] and/or [%Y] in both the source and destination operands.
3.The RETD instruction and the LDB instructions which transfers 8-bit data.
S1C63000 CORE CPU MANUAL
Reads all the flag data
Evacuates the F register
Returns the F register
Returns the F register
...Works as "LD %A, [0x0037]"
...Works as "ADD [0xFF9C], 5"
EPSON
CHAPTER 2: ARCHITECTURE
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