Rr [%Ir; Sbc %R,%R - Epson S1C63000 Core Cpu Manual

Seiko epson s1c63000 cmos 4-bit single chip microcomputer core cpu manual
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RR [%ir]+

Function:
3 2 1 0
Rotates the content of the data memory addressed by the ir register (X or Y) including the carry
(C) to the right for 1 bit. The content of the C flag moves to bit 3 of the data memory and bit 0
moves to the C flag. Then increments the ir register (X or Y). The increment result of the ir
register does not affect the flags.
Code:
Mnemonic
RR [%X]+
RR [%Y]+
Flags:
E
I
Register indirect
Mode:
Extended addressing: Invalid

SBC %r,%r'

Function: r
r - r' - C
Subtracts the content of the r' register (A or B) and carry (C) from the r register (A or B).
Code:
Mnemonic
SBC %A,%A
SBC %A,%B
SBC %B,%A
SBC %B,%B
Flags:
E
I
Src: Register direct
Mode:
Dst: Register direct
Extended addressing: Invalid
S1C63000 CORE CPU MANUAL
Rotate right location [ir reg.] with carry and increment ir reg.
, ir
ir +1
C
[ir]
MSB
1 0 0 0 0 1 1 1 0 1 1 0 1
1 0 0 0 0 1 1 1 0 1 1 1 1
C
Z
Subtract with carry r' reg. from r reg.
MSB
1 1 0 0 0 1 1 1 1 0 0 0 X
1 1 0 0 0 1 1 1 1 0 0 1 X
1 1 0 0 0 1 1 1 1 0 1 0 X
1 1 0 0 0 1 1 1 1 0 1 1 X
C
Z
EPSON
CHAPTER 4: INSTRUCTION SET
LSB
10EDH
10EFH
LSB
18F0H, (18F1H)
18F2H, (18F3H)
18F4H, (18F5H)
18F6H, (18F7H)
2 cycles
1 cycle
123

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