Notes For Interrupt Processing - Epson S1C63000 Core Cpu Manual

CHAPTER 3: CPU OPERATION
• Software interrupts
The software interrupts are generated by the INT instruction. Time of the interrupt generation is
determined by the software, so the I flag setting does not affect the interrupt. That processing is the
same as the subroutine that evacuates the F register into the stack.
This interrupt does not change the interrupt control signals between the CPU and the peripheral
circuits, or the I flag either. An address that is specified with the operand of the INT instruction is
used as it is as the interrupt vector.
CLK
FETCH
BS16
DBS1/0
RDIV
DA00–DA15
D0–D3
M00–M15
IACK

3.5.3 Notes for interrupt processing

(1) After an initial reset, all the interrupts including NMI are masked and cannot be accepted regardless
of the I flag setting until both the stack pointers SP1 and SP2 are set in the program. Be sure to set the
SP1 and SP2 in the initialize routine.
Further, when re-setting the stack pointer, the SP1 and SP2 must be set as a pair. When one of them is
set, all the interrupts including NMI are masked and interrupts cannot be accepted until the other one
is set.
(2) The interrupt processing is the same as a subroutine call that branches to the interrupt vector address.
At that time, the F register is evacuated into the stack. Therefore, the interrupt service routine should
be made as a subroutine and the RETI instruction that returns the F register must be used for return.
(3) If an interrupt (including NMI) is generated while fetching an instruction, that sets the E flag or writes
data to the F (flag) register, the interrupt is accepted after fetching (and executing) the next instruc-
tion. Therefore, the extended addressing with the EXT register is processed before executing the
interrupt processing. However, if the stack data in the memory is directly changed in the interrupt
service routine, the F register in which the E flag is set may return. In this case, the instruction imme-
diately after returning by the RETI instruction is executed in the extended addressing mode by the E
flag that is set to "1". Pay attention to the F register setting except when describing such a processing
consciously.
30
PK
PL
PC
pc-2 pc-1 pc
ANY ANY INT addr6
ANY
WR
RD
ANY
IRQ
IF
Fig. 3.5.2.5 Software interrupt sequence
1 2 3
pc+1 01addr6H
(01addr6H)
2 3
DUMMY
SP2-1 DUMMY SP1-1
F reg. xH
EPSON
4 5
ANY
ANY
2 ANY
pc+1
S1C63000 CORE CPU MANUAL