CHAPTER 4: INSTRUCTION SET
HALT
Function: Halt
Sets the CPU to HALT status.
The CPU stops operating, thus the power consumption is reduced. Peripheral circuits such as
the oscillation circuit still operate.
An interrupt causes it to return from HALT status to the normal program execution status.
Code:
Mnemonic
HALT
E
I
Flags:
–
INC [addr6]
Function: [addr6]
[addr6] + 1
(addr6 = 0000H–003FH)
Increments (+1) the content of the data memory addressed by the addr6.
Code:
Mnemonic
INC [addr6]
Flags:
E
I
–
6-bit absolute
Mode:
Extended addressing: Invalid
92
Set CPU to HALT mode
MSB
1 1 1 1 1 1 1 1 1 1 1 0 0
C
Z
–
–
Increment location [addr6]
MSB
1 0 0 0 0 0 1 a5 a4 a3 a2 a1 a0 1040H–107FH
C
Z
EPSON
LSB
1FFCH
LSB
S1C63000 CORE CPU MANUAL
2 cycles
2 cycles