Push %Ir - Epson S1C63000 Core Cpu Manual

CHAPTER 4: INSTRUCTION SET

PUSH %ir

Function: ([(SP1-1)*4+3]~[(SP1-1)*4])
Decrements the stack pointer SP1, then stores the content of the ir register (X or Y) into the
addresses (4 words) indicated by the SP1 (SP1 indicates the lowest address).
Code:
Mnemonic
PUSH %X
PUSH %Y
Flags: E I
–
Register direct
Mode:
Extended addressing: Invalid
RET
Function: PC ([SP1*4+3]~[SP1*4]), SP1
Loads the 16-bit data (return address) that has been stored in the addresses (4 words) indicated
by the stack pointer SP1 (SP1 indicates the lowest address) into the PC to return from the
subroutine. The SP1 is incremented.
Code:
Mnemonic
RET
E I
Flags:
–
118
Push ir reg. onto stack
ir, SP1
MSB
1 1 1 1 1 1 1 1 0 0 0 0 1
1 1 1 1 1 1 1 1 0 0 0 1 X
C Z
– –
Return from subroutine
SP1 +1
MSB
1 1 1 1 1 1 1 1 1 1 0 X 0
C Z
– –
EPSON
SP1 -1
LSB
1FE1H
1FE2H, (1FE3H)
LSB
1FF8H, (1FFAH)
S1C63000 CORE CPU MANUAL
1 cycle
1 cycle