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Intel® Server Chassis SC1400UP / Intel® Server Platform SR1425BK1-E
Vout
10%
Vout
V1
V2
V3
V4
Item
Description
T
Delay from AC being applied to 5VSB being
sb_on_delay
within regulation.
T
Delay from AC being applied to all output
ac_on_delay
voltages being within regulation.
T
Time all output voltages stay within regulation
vout_holdup
after loss of AC.
T
Delay from loss of AC to de-assertion of PWOK
pwok_holdup
T
Delay from PSON
pson_on_delay
within regulation limits.
T
Delay from PSON
pson_pwok
asserted.
T
Delay from output voltages within regulation
pwok_on
limits to PWOK asserted at turn on.
T
Delay from PWOK de-asserted to output
pwok_off
voltages (3.3V, 5V, 12V, -12V) dropping out of
regulation limits.
T
Duration of PWOK being in the de-asserted
pwok_low
state during an off/on cycle using AC or the
PSON signal.
T
Delay from 5VSB being in regulation to O/Ps
sb_vout
being in regulation at AC turn on.
T
Time the 5VSB output voltage stays within
5VSB_holdup
regulation after loss of AC.
Revision 1.0
T
vout rise
T
vout_on
Figure 36. Output Voltage Timing
Table 38. Turn On/Off Timing
#
active to output voltages
#
deactive to PWOK being de-
T
vout_off
MIN
MAX
1500
2500
21
20
5
400
50
100
1000
1
200
100
50
1000
70
UNITS
msec
msec
msec
msec
msec
msec
msec
msec
msec
msec
msec
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