Spi Decoding; Figure 18.10 Spi Serial Bus - Rigol DHO924S User Manual

18.4
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Address information in decoding
For I2C bus, each frame of data starts with the address information (read address and
write address). In the address information, "Read" indicates the read address
( ) and "Write" indicates the write address (
whether to include or exclude the "R/W" bit for the address information.
Error expressions in decoding
In I2C decoding, the response includes ACK (acknowledgment) and NACK (non-
acknowledgment). When NACK is detected after "Write", red error report information
( ) is displayed.

SPI Decoding

SPI bus is based on the master — slave configuration and usually consists of chip
select line (CS), clock line (CLK), and data line (SDA). Wherein, the data lines include
the master input/slave output (MISO) data line and master output/slave input (MOSI)
data line. The oscilloscope samples the channel data on the rising or falling edge of
the clock signal and judge each data point (logic "1" or logic "0") according to the
preset threshold level.
CLK
MOSI
Master
MISO
CS
In the Decode menu, click or tap the drop-down button of Bus Type to select SPI,
then configure the parameters for SPI decoding.
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15
10 20
5 25
0 30
Slave
CLK
SDA
(MISO/MOSI)

Figure 18.10 SPI Serial Bus

). You can decide
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