Spi Decoding; Figure 14.11 Spi Serial Bus; Figure 14.12 Spi Decoding Menu - Rigol HDO1000 Series User Manual

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Protocol Decoding
14.4

SPI Decoding

SPI bus is based on the master — slave configuration and usually consists of chip
select line (CS), clock line (CLK), and data line (SDA). Wherein, the data lines include
the master input/slave output (MISO) data line and master output/slave input (MOSI)
data line. The oscilloscope samples the channel data on the rising or falling edge of
the clock signal (if the source is an analog channel, the oscilloscope will also judge
each data point (logic "1" or logic "0") according to the preset threshold level).
Master
In the Decode menu, click or tap the drop-down button of Bus Type to select SPI,
then configure the parameters for SPI decoding.
Bus Status
Click or tap the Bus Status on/off switch to enable or disable the bus decoding.
HDO1000 User Guide
184
CLK
MOSI
Slave
MISO
CS

Figure 14.11 SPI Serial Bus

Figure 14.12 SPI Decoding Menu

Copyright ©RIGOL TECHNOLOGIES CO., LTD. All rights reserved.
CLK
SDA
(MISO/MOSI)

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