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Theory of Operation
The Pattern Generator Board
The Pattern Generator Board
The Pattern Generator Board
Pattern Generator Board Theory (HP 1660CP series only)
Loop Register
The loop register holds the programmable vector flow information. When the pattern
generator reaches the end of the vector listing, the loop register is queried for the RAM
address location of the next user-programmed vector. In many cases, the next vector address
location would be the start of the vector listing. Consequently the vectors would continue to
loop from the end of the listing back to the beginning until the user instructs the module to
stop.
RAM
Consisting of six 256Kx16 VRAM ICs and RAM addressing circuitry, the RAM stores the
desired patterns that appear at the output. The RAM addressing circuitry is merely a counter
which addresses the pattern locations in RAM. When the end of the vector listing is reached,
the addressing circuitry is loaded from the loop register with the address of the first vector of
the listing to provide an uninterrupted vector loop. The RAM output is sent to the Output
Driver circuit where the patterns are presented into a logic configuration usable by the output
pods.
8–13
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