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Verify the test signal
Check the clock pulse width. Using the oscilloscope, verify that the clock pulse
1
width is 3.500 ns, +0 ps or −100 ps.
a Enable the pulse generator channel 1, channel 2, and trigger outputs (LED off).
b In the oscilloscope Timebase menu, select Scale: 1.000 ns/div.
c In the oscilloscope Timebase menu, select Position. Using the oscilloscope knob,
position the clock waveform so that the waveform is centered on the screen.
d On the oscilloscope, select [Shift] + width: channel 2, then select [Enter] to display the
clock signal pulse width (+ width(2)).
e If the pulse width is outside the limits, adjust the pulse generator channel 2 width until
the pulse width is within limits.
Check the clock period. Using the oscilloscope, verify that the clock period is
2
10.000 ns, +0 ps or −250 ps.
a a In the oscilloscope Timebase menu, select Scale: 2.000 ns/div.
b In the oscilloscope Timebase menu, select Position. Using the oscilloscope knob,
position the clock waveform so that a rising edge appears at the left of the display.
c On the oscilloscope, select [Shift] Period: channel 2, then select [Enter] to display the
clock period (Period(2)). If the period is not less than 10.000 ns, go to step d. If the
period is less than 10.000 ns, go to step 3.
d In the oscilloscope Timebase menu, increase Position 10.000 ns. If the period is not
less than 10.000 ns, decrease the pulse generator Chan 2 Doub in 10 ps increments
until one of the two periods measured is less than 10.000 ns.
To test the single-clock, single-edge, state acquisition (logic analyzer)
Testing Performance
3–29
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