Svd Control Register - Epson S1C17W22 Technical Manual

Cmos 16-bit single chip microcontroller
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10 SUPPLY VOLTAGE DETECTOR (SVD)
SVDCLK.
CLKDIV[2:0] bits
0x6, 0x7
0x5
0x4
0x3
0x2
0x1
0x0
(Note) The oscillation circuits/external input that are not supported in this IC cannot be
selected as the clock source.
Note: The clock frequency should be set to around 32 kHz.

SVD Control Register

Register name
Bit
SVDCTL
15
14–13 SVDSC[1:0]
12–8 SVDC[4:0]
7–4 SVDRE[3:0]
3
2–1 SVDMD[1:0]
0
Bit 15
VDSEL
This bit selects the power supply voltage to be detected by SVD.
1 (R/WP): Voltage applied to the EXSVD pin
0 (R/WP): V
Bits 14–13 SVDSC[1:0]
These bits set the condition to generate an interrupt/reset (number of successive low voltage detec-
tions) in intermittent operation mode (SVDCTL.SVDMD[1:0] bits = 0x1 to 0x3).
Table 10.6.2 Interrupt/Reset Generating Condition in Intermittent Operation Mode
SVDCTL.SVDSC[1:0] bits
0x3
0x2
0x1
0x0
This setting is ineffective in continuous operation mode (SVDCTL.SVDMD[1:0] bits = 0x0).
Bits 12–8 SVDC[4:0]
These bits select an SVD detection voltage V
For more information, refer to "Supply Voltage Detector Characteristics, SVD detection voltage
V
" in the "Electrical Characteristics" chapter.
SVD
10-6
Table 10.6.1 Clock Source and Division Ratio Settings
0x0
IOSC
Reserved
1/128
1/64
1/32
1/16
1/8
1/4
Bit name
Initial
VDSEL
0x0
0x00
0x0
0x0
MODEN
DD
Low power supply voltage is successively detected eight times.
Low power supply voltage is successively detected four times.
Low power supply voltage is successively detected twice.
Low power supply voltage is successively detected once.
Table 10.6.3 Setting of SVD Detection Voltage V
SVDCTL.SVDC[4:0] bits
0x1e
0x1d
0x1c
:
0x02
0x01
0x00, 0x1f
Seiko Epson Corporation
SVDCLK.CLKSRC[1:0] bits
0x1
0x2
OSC1
OSC3
1/1
Reserved
1/128
1/64
1/32
1/16
1/8
1/4
Reset
R/W
0
H1
R/WP –
H0
R/WP Writing takes effect when the SVDCTL.
SVDMD[1:0] bits are not 0x0.
H1
R/WP –
H1
R/WP
0
R
H0
R/WP
0
H1
R/WP
Interrupt/reset generating condition
for detecting low voltage from among 30 levels.
SVD
SVD detection voltage V
High
Low
Use prohibited
0x3
EXOSC
1/1
Remarks
SVD
[V]
SVD
S1C17W22/W23 TECHNICAL MANUAL
(Rev. 1.3)

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