Table of Contents
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Code No.
Page
412690403
10-3
10.4.1 SVD Control
Starting detection
Corrected Step 4.
4. ...
14-1
14.1 Overview
Added the following description:
• The input filter for the SDA and SCL inputs does not comply with the standard for removing noise
14-7 to 8
14.4.3 Data Reception in Master Mode
Data receiving procedure
Added Step 1. (The old step numbers were carried down in order.)
1. When receiving one-byte data, write 1 to the I2CnCTL.TXNACK bit.
Modified Figure 14.4.3.2.
A flow for Step 1 was added.
14-12 to 13 14.4.6 Data Reception in Slave Mode
Data receiving procedure
Added Step 1. (The old step numbers were carried down in order.)
1. When receiving one-byte data, write 1 to the I2CnCTL.TXNACK bit.
Modified Figure 14.4.6.2.
A flow for Step 1 was added.
15-5
15.4.2 Counter Block Operations
MAX counter data register
Added a note.
Note: When rewriting the MAX value, the new MAX value should be written after the counter has been
18-2
18.2.1 List of Output Pins
Modified Table 18.2.1.1.
SEGxx/COMxx pin I/O: O → A
Added a note.
Notes: ...
18-6
18.4.3 External Voltage Application Mode 2
Corrected the description.
In this mode, the LCD drive voltage V
internally generated.
18-8
18.5.2 Display On/Off
Added a note.
Note: When "Display off" is selected, the electric charges of V
23-1
23.1 Absolute Maximum Ratings
Modified the characteristics table.
V
: #RESET was added to the condition.
I
23-1
23.2 Recommended Operating Conditions
Added "(V
*1 The potential variation of the V
*7 The component values should be determined after evaluating operations using an actual mounting
Modified the characteristics table.
V
C1-3/4
V
C1-4
C
VPP
23-4
23.4 System Reset Controller (SRC) Characteristics
Reset hold circuit characteristics
Modified the characteristics table.
t
RSTR
23-7
23.6 Flash Memory Characteristics
Added an annotation.
*1 The potential variation of the V
- Set the SVDINTE.SVDIE bit to 1.
spikes less than 50 ns.
reset to the previously set MAX value.
• When an LCD panel is connected, set the LCD8CTL.MODEN bit to 1, as activating the LCD
panel when it is set to 0 may cause the LCD panel characteristics to fluctuate.
following procedure.
...
To turn the display on again, perform the above procedure in the reverse order.
= 0 V) *1" and the following annotations:
SS
ground potential of the MCU mounting board while the Flash is being programmed, as it affects the
Flash memory characteristics (programming count).
board.
(1/3 bias): Condition = When an external voltage is applied V
(1/4 bias): Condition = When an external voltage is applied V
: *6 was deleted.
: Min. = 0.5 ms, Max. = 0.9 ms
ground potential of the MCU mounting board while the Flash is being programmed, as it affects the
Flash memory characteristics (programming count).
Contents
or V
is applied from outside the IC and other voltages are
C1
C2
voltage should be suppressed to within ±0.3 V on the basis of the
SS
voltage should be suppressed to within ±0.3 V on the basis of the
SS
REVISION HISTORY
(or V
) must be discharged in the
C4
C3
≤ V
≤ V
(= V
), V
C1
C2
C3
C4
C1
≤ V
≤ V
≤ V
, V
≤ V
C1
C2
C3
C4
C1
≤ V
DD
DD
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