Epson S1C17W22 Technical Manual page 329

APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
0x5200–0x520e
Address Register name
0x5200 UA1CLK
(UART Ch.1 Clock
Control Register)
0x5202 UA1MOD
(UART Ch.1 Mode
Register)
0x5204 UA1BR
(UART Ch.1 Baud-
Rate Register)
0x5206 UA1CTL
(UART Ch.1 Control
Register)
0x5208 UA1TXD
(UART Ch.1 Transmit
Data Register)
0x520a UA1RXD
(UART Ch.1 Receive
Data Register)
0x520c UA1INTF
(UART Ch.1 Status
and Interrupt Flag
Register)
0x520e UA1INTE
(UART Ch.1 Interrupt
Enable Register)
AP-A-20
Bit Bit name
15–9 –
8 DBRUN
7–6 –
5–4 CLKDIV[1:0]
3–2 –
1–0 CLKSRC[1:0]
15–10 –
9 INVIRRX
8 INVIRTX
7 –
6 PUEN
5 OUTMD
4 IRMD
3 CHLN
2 PREN
1 PRMD
0 STPB
15–12 –
11–8 FMD[3:0]
7–0 BRT[7:0]
15–8 –
7–2 –
1 SFTRST
0 MODEN
15–8 –
7–0 TXD[7:0]
15–8 –
7–0 RXD[7:0]
15–10 –
9 RBSY
8 TBSY
7 –
6 TENDIF
5 FEIF
4 PEIF
3 OEIF
2 RB2FIF
1 RB1FIF
0 TBEIF
15–8 –
7 –
6 TENDIE
5 FEIE
4 PEIE
3 OEIE
2 RB2FIE
1 RB1FIE
0 TBEIE
Seiko Epson Corporation
UART (UART) Ch.1 (S1C17W23 only)
Initial Reset R/W
0x00 – R
0 H0 R/W
0x0 – R
0x0 H0 R/W
0x0 – R
0x0 H0 R/W
0x00 – R
0 H0 R/W
0 H0 R/W
0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0x0 – R
0x0 H0 R/W
0x00 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
0 H0 R/W
0x00 – R
0x00 H0 R/W
0x00 – R
0x00 H0 R
0x00 – R
0 H0/S0 R
0 H0/S0 R
0 – R
0 H0/S0 R/W
0 H0/S0 R/W
0 H0/S0 R/W
0 H0/S0 R/W
0 H0/S0 R
0 H0/S0 R
1 H0/S0 R
0x00 – R
0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
S1C17W22/W23 TECHNICAL MANUAL
Remarks
–
–
–
–
–
–
–
Cleared by writing 1.
Cleared by writing 1 or read-
ing the UA1RXD register.
Cleared by writing 1.
Cleared by reading the
UA1RXD register.
Cleared by writing to the
UA1TXD register.
–
(Rev. 1.3)