The STM32 Cortex-M0 instruction set
3.5.7
REV, REV16, and REVSH
Reverse bytes and reverse bits.
Syntax
op Rd, Rn
where:
●
'op' is one of:
REV: Reverse byte order in a word
REV16: Reverse byte order in each halfword independently
REVSH: Reverse byte order in the bottom halfword, and sign extends to 32 bits
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'Rd' is the destination register
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'Rn' is the register holding the operand
Operation
Use these instructions to change endianness of data:
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REV: Converts either:
–
–
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REV16: Converts either:
–
–
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REVSH: Converts either:
–
–
Restrictions
In these instructions, Rd, and Rn must only specify R0-R7.
Condition flags
These instructions do not change the flags.
Examples
REV R3, R7
REV16 R0, R0 ; reverse byte order of each 16-bit halfword in R0
REVSH R0, R5 ; reverse Signed Halfword
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32-bit big-endian data into little-endian data or
32-bit little-endian data into big-endian data.
2 packed 16-bit big-endian data into little-endian data or
2 packed 16-bit little-endian data into big-endian data.
16-bit signed big-endian data into 32-bit signed little-endian data or
16-bit signed little-endian data into 32-bit signed big-endian data
; reverse byte order of value in R7 and write it to R3
Doc ID 022979 Rev 1
PM0215
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