The STM32 Cortex-M0 instruction set
3.7.2
CPSID CPSIE
Change processor state.
Syntax
CPSID i
CPSIE i
Operation
CPS changes the PRIMASK special register values. CPSID causes interrupts to be disabled
by setting PRIMASK. CPSIE cause interrupts to be enabled by clearing PRIMASK. See
Exception mask registers on page 15
Restrictions
None
Condition flags
This instruction does not change the condition flags.
Examples
CPSID i ; Disable all interrupts except NMI (set PRIMASK)
CPSIE i ; Enable interrupts (clear PRIMASK)
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for more information about these registers.
Doc ID 022979 Rev 1
PM0215
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