Mov, Movs And Mvns - ST STM32F0 Series Programming Manual

The STM32 Cortex-M0 instruction set
3.5.5

MOV, MOVS and MVNS

Move and move NOT.
Syntax
MOV{S} Rd, Rm
MOVS Rd, #imm
MVNS Rd, Rm
where:
●
'S' is an optional suffix. If S is specified, the condition code flags are updated on the
result of the operation (see
● 'Rd' is the destination register
●
'Rm' is a register
● 'imm' is any value in the range 0-255
Operation
The MOV instruction copies the value of Rm into Rd.
The MOVS instruction performs the same operation as the MOV instruction, but also
updates the N and Z flags.
The MVNS instruction takes the value of Rm, performs a bitwise logical NOT operation on the
value, and places the result into Rd.
Restrictions
In these instructions, Rd, and Rm must only specify R0-R7.
When Rd is the PC in a MOV instruction:
●
bit[0] of the result is ignored
● A branch occurs to the address created by forcing bit[0] of that value to 0. The T-bit
remains unmodified.
Note: Though it is possible to use MOV as a branch instruction, ARM strongly recommends the use
of a BX or BLX instruction to branch for software portability to the ARM instruction set.
Condition flags
If S is specified, these instructions:
●
Update the N and Z flags according to the result
● Do not affect the C or V flag
Example
MOVS R0, #0x000B
MOVS R1, #0x0
MOV R10, R12
MOVS R3, #23
MOV R8, SP
MVNS R2, R0
54/91
Conditional execution on page
; Write value of 0x000B to R0, flags get updated
; Write value of zero to R1, flags are updated
; Write value in R12 to R10, flags are not updated
; Write value of 23 to R3
; Write value of stack pointer to R8
; Write inverse of R0 to the R2 and update flags
Doc ID 022979 Rev 1
PM0215
39).