General Data Processing Instructions; Table 19. Data Processing Instructions - ST STM32F0 Series Programming Manual

The STM32 Cortex-M0 instruction set
3.5

General data processing instructions

Table 19
Table 19.
Mnemonic
ADCS
ADD(S)
ANDS
ASRS
BICS
CMN
CMP
EORS
LSLS
LSRS
MOV(S)
MULS
MVNS
ORRS
REV
REV16
REVSH
RORS
RSBS
SBCS
SUBS
SUBW
SXTB
SXTH
UXTB
UXTH
TST
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shows the data processing instructions.
Data processing instructions
Brief description
Add with carry
Add
Logical AND
Arithmetic shift right
Bit clear
Compare negative
Compare
Exclusive OR
Logical shift left
Logical shift right
Move
Multiply
Move NOT
Logical OR
Reverse byte order in a word
Reverse byte order in each halfword
Reverse byte order in bottom halfword
and sign extend
Rotate right
Reverse subtract
Subtract with carry
Subtract
Subtract
Sign extends to 32 bits
Sign extends to 32 bits
Zero extends to 32 bits
Zero extends to 32 bits
Test
Doc ID 022979 Rev 1
See
ADD{S}, ADCS, SUB{S}, SBCS, and RSBS on
page 49
ADD{S}, ADCS, SUB{S}, SBCS, and RSBS on
page 49
ANDS, ORRS, EORS and BICS on page 51
ASRS, LSLS, LSRS and RORS on page 52
ANDS, ORRS, EORS and BICS on page 51
CMP and CMN on page 53
CMP and CMN on page 53
ANDS, ORRS, EORS and BICS on page 51
ASRS, LSLS, LSRS and RORS on page 52
ASRS, LSLS, LSRS and RORS on page 52
MOV, MOVS and MVNS on page 54
MULS on page 55
MOV, MOVS and MVNS on page 54
ANDS, ORRS, EORS and BICS on page 51
REV, REV16, and REVSH on page 56
REV, REV16, and REVSH on page 56
REV, REV16, and REVSH on page 56
ASRS, LSLS, LSRS and RORS on page 52
ADD{S}, ADCS, SUB{S}, SBCS, and RSBS on
page 49
ADD{S}, ADCS, SUB{S}, SBCS, and RSBS on
page 49
ADD{S}, ADCS, SUB{S}, SBCS, and RSBS on
page 49
ADD{S}, ADCS, SUB{S}, SBCS, and RSBS on
page 49
SXTB, SXTH, UXTB and UXTH on page 57
SXTB, SXTH, UXTB and UXTH on page 57
SXTB, SXTH, UXTB and UXTH on page 57
SXTB, SXTH, UXTB and UXTH on page 57
TST on page 58
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