Branch And Control Instructions; B, Bl, Bx, And Blx; Table 21. Branch And Control Instructions; Table 22. Branch Ranges - ST STM32F0 Series Programming Manual

PM0215
3.6

Branch and control instructions

Table 21
Table 21.
Mnemonic
B{cc}
BL
BLX
BX
3.6.1

B, BL, BX, and BLX

Branch instructions.
Syntax
B{cond} label
BL label
BX Rm
BLX Rm
where:
●
'B' is branch (immediate).
●
'BL' is branch with link (immediate).
●
'BX' is branch indirect (register).
●
'BLX' is branch indirect with link (register).
●
'label' is a PC-relative expression. See
●
'Rm' is a register that indicates an address to branch to.
●
'Cond' is an optional condition code, see
Operation
All these instructions cause a branch to label, or to the address indicated in Rm. In addition:
●
The BL and BLX instructions write the address of the next instruction to LR (the link
register, R14).
● The BX and BLX instructions cause a Hard fault exception if bit[0] of Rm is 0.
●
The BL and BLX instructions also set bit[0] of the LR to 1. This ensures that the value is
suitable for use by a subsequent POP {PC} or BX instruction to perform a successful
return branch.
Table 22
Table 22.
B label
Bcond label
shows the branch and control instructions:
Branch and control instructions
Brief description
Branch {conditionally}
Branch with link
Branch indirect with link
Branch indirect
shows the ranges for the various branch instructions.
Branch ranges
Instruction
Doc ID 022979 Rev 1
The STM32 Cortex-M0 instruction set
B, BL, BX, and BLX on page 59
PC-relative expressions on page
Conditional execution on page
Branch range
− 2 KB to +2 KB
− 256 bytes to +254 bytes
See
39.
39.
59/91