ST STM32F0 Series Programming Manual page 34

The STM32 Cortex-M0 instruction set
Table 14.
Mnemonic
SUB{S}
SVC
SXTB
SXTH
TST
UXTB
UXTH
WFE
WFI
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Cortex-M0 instructions
Operands
{Rd,} Rn, <Rm|#imm> Subtract
#imm Supervisor call
Rd, Rm Sign extend byte
Rd, Rm Sign extend halfword
Rn, Rm Logical AND based test
Rd, Rm Zero extend a byte
Rd, Rm Zero extend a halfword
- Wait for event
- Wait for interrupt
Doc ID 022979 Rev 1
Brief description
PM0215
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