Memory Model; Figure 6. Memory Map - ST STM32F0 Series Programming Manual

The STM32 Cortex-M0 processor
2.2

Memory model

This section describes the processor memory map, and the behavior of memory accesses.
The processor has a fixed memory map that provides up to 4 GB of addressable memory.
Figure 6.
The processor reserves regions of the Private peripheral bus (PPB) address range for core
peripheral registers, see
page 69.
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Memory map
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