Furuno FAR-2107 Series Service Manual page 438

The figure below shows the overview of functions of FPGA. See page.7-37 for specific
signal processing.
FULL LOG Video
SEM LOG Video
AD Con.
OP video signal
ARPA test echo
Test echo/HD/BP/TRIG
From/To
RS-422
RFC p.c.b
RS-422
To
External Display
From
External Radar
Echo detct
8 8
ARPA
test echo
SAMPL TRIG
TX TRG
Encode
EXT TRIG
HD
BP
Decode
HD
BP
SAMPL TRIG
EXT TRIG
EXT BP
EXT HD
Fig. 7.3.6 Block diagram of FPGA
ARPA CPU
Echo select
ACQ
Tracking
CPA/TCPT
8 8
Trigger GEN
(Jamming)
HD
PLL BP(8192)
GYRO data
RF TXD
UART
RF RXD
(I/O)
SPU FPGA
MAIN CPU
Main CONT
DRW CPU
Graphic data
processing
7-33
7.3 Processor Unit (RPU-013)
8
Echo FPGA
- Coler palette
Display
Display color
priority
- Brilliance
Sync sig. GEN
Closs cursor
processing
Closs cursor
data
DRW FPGA
NET-100
(LAN I/F)
108MHz Dot
CLK