Debug Support - ST STM32G4 Series Reference Manual

Debug support (DBG)
47 Debug support (DBG)
47.1 Overview
The STM32G4 Series devices are built around a Cortex
hardware extensions for advanced debugging features. The debug extensions allow the
core to be stopped either on a given instruction fetch (breakpoint) or data access
(watchpoint). When stopped, the core's internal state and the system's external state may
be examined. Once examination is complete, the core and the system may be restored and
program execution resumed.
The debug features are used by the debugger host when connecting to and debugging the
STM32G4 Series MCUs.
Two interfaces for debug are available:
•
Serial wire
•
JTAG debug port
Figure 684. Block diagram of STM32 MCU and Cortex
JTMS/
SWDIO
JTDI
JTDO/
TRACESWO
NJTRST
JTCK/
SWCLK
Note: The debug features embedded in the Cortex
CoreSight Design Kit.
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STM32 MCU debug suppo rt
Cortex-M4 debug support
Cortex-M4
Core
SWJ-DP
AHB-AP
Internal private
peripheral bus (PPB)

debug support

Bus matrix
Data
External private
peripheral bus (PPB)
Bridge
NVIC
DWT
FPB
ITM
®
-M4 with FPU core are a subset of the Arm
RM0440 Rev 4
®
-M4 with FPU core which contains
®
-M4 with FPU-level
DCode
interface
System
interface
ETM
Trace port
TPIU
DBGMCU
RM0440
TRACESWO
TRACECK
TRACED[3:0]
MS19234V1
®