ST STM32G4 Series Reference Manual page 2118

Revision history
Date Revision
3
06-Apr-2020
(continued)
2118/2126
Table 447. Document revision history (continued)
DMA request multiplexer (DMAMUX) section:
– Updated Section 13.3.2: DMAMUX
Analog digital converter (ADC) section:
Updated:
– Section 21.2: ADC main
– Figure 83: ADC clock
– Figure 86: ADC3 connectivity.
– Section 21.4.7: Single-ended and differential input
Comparator (COMP) section:
Updated Figure 168: Comparator block
Operational amplifier (OPAMP) section:
Updated:
– Table 200: Operational amplifier possible
– Section 25.3.7: Calibration
– Section 25.3.8: Timer controlled Multiplexer mode
– Section 25.5.1: OPAMP1 control/status register
– Section 25.5.2: OPAMP2 control/status register
– Section 25.5.3: OPAMP3 control/status register
– Section 25.5.4: OPAMP4 control/status register
– Section 25.5.5: OPAMP5 control/status register
– Section 25.5.6: OPAMP6 control/status register
Advanced-control timers (TIM1/TIM8/TIM20) section:
Updated:
– Section 28.6.27: TIMx alternate function option register 1 (TIMx_AF1)(x = 1, 8,
– Section 28.6.28: TIMx alternate function register 2 (TIMx_AF2)(x = 1, 8,
FD controller area network (FDCAN) section:
Updated Section 44.4.7: FDCAN nominal bit timing and prescaler register
(FDCAN_NBTP) note.
Debug support (DBG) section:
Updated:
– Section 47.4.3: Internal pull-up and pull-down on JTAG
– Section 47.6.1: MCU device ID
– Section 47.6.2: Boundary scan
Device electronic signature section:
– Added Section 48.3: Package data
RM0440 Rev 4
Changes
mapping.
features.
scheme.
diagram.
connection.
procedure.
code.
TAP.
register.
channels.
procedure.
(OPAMP1_CSR).
(OPAMP2_CSR).
(OPAMP3_CSR).
(OPAMP4_CSR).
(OPAMP5_CSR).
(OPAMP6_CSR).
pins.
RM0440
20).
20).