I²C Bus/Sm Bus Header; Espi/Spi1 Header; Table 27 X30 Pinout Description; Table 28 Cn1 Pinout Description - Congatec SMARC conga-SMC1 User Manual

4.13 I²C Bus/SM Bus Header
The conga-SMC1 provides header X30 for I²C/SM bus signals. All I/O signals have 1.8 V level. The 3.3 V is provided through a 500 mA resetable fuse.
Table 27 X30 Pinout Description
Pin Signal
1 N.C
2 I2C_GP_DAT
3 GND
4 I2C_GP_CK
5 +3.3 V
6 SMB_ALERT_1V8#
7 I2C_PM_DAT/SMB_DAT
8 GND
9 I2C_PM_CK/SMB_CLK
10 + 3.3 V
Note
Use pin 5 (runtime power) for I2C devices and pin 10 (standby power) for I2C_PM/SMBus devices.
Connector Type
X30: 10-pin, 1.25 mm pitch picoblade header (Molex 0533981071)
Possible Mating Connector: Molex 0510211000
4.14

eSPI/SPI1 Header

The conga-SMC1 provides eSPI/SPI signals on connector CN1 for general purpose SPI add-on modules. All I/O signals have 1.8 V level.
Table 28 CN1 Pinout Description
Pin Signal Description
1 GND Ground
3 ESPI_CK ESPI master clock output
5 Empty
7 ESPI_RESET# ESPI reset output
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Description
Not connected
General purpose I2C data
Ground reference
General purpose I2C clock output
+3.3 V runtime power output with 500 mA fuse
SMBus Alert signal from external device. Should be driven by open drain/collector output
Power management I2C data or SM bus data on x86 variant
Ground reference
Power management I2C clock output or SM bus clock output on x86 variant
+3.3 V power output with 500 mA (standby)
Pin Signal
2
4
6
8
Description
ESPI_CS0# ESPI master chip select output for first eSPI device
ESPI_IO3 ESPI master data input/output 3
ESPI_IO2 ESPI master data input/output 2
ESPI_IO1 ESPI master data input/output 1
Master input, slave output in single I/O mode
SMC1m10
X30
CN1
Pin 2
Pin 1
42/50