Vita 57.1 Fmc1 Hpc Connector (Partially Populated) - Xilinx VC709 User Manual

Evaluation board for the virtex-7 fpga
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VC709 Evaluation Board Features
Chapter 1:
X-Ref Target - Figure 1-23
Figure 1-24
X-Ref Target - Figure 1-24

VITA 57.1 FMC1 HPC Connector (Partially Populated)

[Figure
The VC709 board implements one instance of the FMC HPC VITA 57.1 specification connector.
This section discusses the FMC1 HPC J35 connector.
Note:
away from the VC709 board.
The VITA 57.1 FMC standard calls a high pin count (HPC), 400 pin 10 x 40 position form factor
connector. The 10 x 40 rows of an FMC HPC connector provides pins for up to:
The VC709 board FMC1 HPC connector J35 implements a subset of the maximum signal and clock
connectivity capabilities:
54
Send Feedback
To ATX 4-Pin Peripheral
Power Connector
Figure 1-23: ATX Power Supply Adapter Cable
shows the power connector J18, power switch SW12, and indicator LED DS16.
J18
VCC12_P_IN
1
12V
4
12V
2
N/C
5
N/C
3
COM
6
COM
INPUT_GND
PCIe
Power
Figure 1-24: Power On/Off Switch SW15
1-2, callout 22]
The FMC1 HPC J35 connector is a keyed connector oriented so that a plug-on card faces
160 single-ended or 80 differential user-defined signals
10 GTH transceivers
2 GTH clocks
4 differential clocks
159 ground and 15 power connections
80 differential user-defined pairs:
34 LA pairs (LA00-LA33)
24 HA pairs (HA00-HA23)
22 HB pairs (HB00-HB21)
www.xilinx.com
SW12
U73
1
2
3
1
4
5
6
C471
1μF
25V
3
INPUT_GND
To J18 on VC709 Board
UG887_c1_20_083112
VCC12_P
8
R279
C320
330μF
1kΩ
25V
1%
7
DS16
6
5
GND
GND
UG887_c1_21_090612
VC709 Evaluation Board
UG887 (v1.6) March 11, 2019

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