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Table 1-4: DDR3 SODIMM Socket J1 Connections to the FPGA (Cont'd)
XCVX690T (U1) Pin
F26
D30
M13
K15
F12
A14
C23
D25
C31
F31
M16
N16
J12
K12
G16
H16
C14
C15
A27
A26
E25
F25
B29
B28
E28
E27
E18
E19
F19
G19
K19
J18
VC709 Evaluation Board
UG887 (v1.6) March 11, 2019
Net Name
DDR3_A_D62
DDR3_A_D63
DDR3_A_DM0
DDR3_A_DM1
DDR3_A_DM2
DDR3_A_DM3
DDR3_A_DM4
DDR3_A_DM5
DDR3_A_DM6
DDR3_A_DM7
DDR3_A_DQS0_N
DDR3_A_DQS0_P
DDR3_A_DQS1_N
DDR3_A_DQS1_P
DDR3_A_DQS2_N
DDR3_A_DQS2_P
DDR3_A_DQS3_N
DDR3_A_DQS3_P
DDR3_A_DQS4_N
DDR3_A_DQS4_P
DDR3_A_DQS5_N
DDR3_A_DQS5_P
DDR3_A_DQS6_N
DDR3_A_DQS6_P
DDR3_A_DQS7_N
DDR3_A_DQS7_P
DDR3_A_CLK0_N
DDR3_A_CLK0_P
DDR3_A_CLK1_N
DDR3_A_CLK1_P
DDR3_A_CKE0
DDR3_A_CKE1
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DDR3 SODIMM Memory J1
I/O Standard
Pin Number
SSTL15
SSTL15
SSTL15
SSTL15
SSTL15
SSTL15
SSTL15
SSTL15
SSTL15
SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
DIFF_SSTL15
SSTL15
SSTL15
Feature Descriptions
Pin Number
192
DQ62
194
DQ63
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
10
DQS0_N
12
DQS0_P
27
DQS1_N
29
DQS1_P
45
DQS2_N
47
DQS2_P
62
DQS3_N
64
DQS3_P
135
DQS4_N
137
DQS4_P
152
DQS5_N
154
DQS5_P
169
DQS6_N
171
DQS6_P
186
DQS7_N
188
DQS7_P
103
CK0_N
101
CK0_P
104
CK1_N
102
CK1_P
73
CKE0
74
CKE1
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