Table of Contents
Advertisement
Table 16. Memory Settings details (continued)
Option
Memory Interleaving
Opportunistic Self-Refresh
Correctable Error Logging
Processor settings
To view the Processor Settings screen, power on the system, press F2, and click System Setup Main Menu > System BIOS >
Processor Settings.
Table 17. Processor Settings details
Option
Logical Processor
Virtualization Technology
IOMMU Support
L1 Stream HW Prefetcher
L2 Stream HW Prefetcher
MADT Core Enumeration
NUMA Nodes Per Socket
CCX as NUMA Domain L3 cache as NUMA Domain
Minimum SEV-ES ASID
x2APIC Mode
Number of CCDs per Processor
Number of Cores per CCD
Processor Core Speed
Processor Bus Speed
Processor n
36
Pre-operating system management applications
Description
Enables or disables the memory interleaving option. The two options available
are Auto and Disabled. This option is set to Auto by default.
Enables or disables opportunistic self-refresh feature. This option is set to
Disabled by default.
Enables or disables correctable error logging. This option is set to Enabled by
default.
Description
Each processor core supports up to two logical processors. If this
option is set to Enabled, the BIOS displays all the logical
processors. If this option is set to Disabled, the BIOS displays only
one logical processor per core. This option is set to Enabled by
default.
Enables or disables the virtualization technology for the processor.
This option is set to Enabled by default.
Enable or Disable IOMMU support. It is required to create IVRS
ACPI table. This option is set to Enabled by default.
Enables or disables the L1 stream hardware prefetcher. This option
is set to Enabled by default.
Enables or disables the L2 stream hardware prefetcher. This option
is set to Enabled by default.
Specifies the MADT Core Enumeration. This option is set to Linear
by default.
Specifies the number of NUMA nodes per socket. This option is set
to 1 by default.
Enables or disables the CCXL3 cache as NUMA Domain. This
option is set to Disabled by default.
Determines the number of Secure Encrypted Virtualization ES and
non ES available Address Space IDs. This option is set to 1 by
default.
Enable or disable x2APIC mode. This option is set to Enabled by
default.
Controls the number of enabled CCDs in each processor. This
option is set to All by default.
specifies the number of cores per CCD. This option is set to All by
default.
Specifies the maximum core frequency of the processor.
Specifies the bus speed of the processor.
NOTE:
The processor bus speed option displays only
when both processors are installed.
NOTE:
Depending on the number of CPUs, there might
be up to n processors listed.
Advertisement
Table of Contents
