Mitsubishi Electric Melsec Q Series User Manual page 106

Ethernet interface module
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4 WHEN THE Q/LCPU ACCESSES THE PROGRAMMABLE CONTROLLER
OF ANOTHER STATION USING THE DATA LINK INSTRUCTION
Sequence scan
Send command
Sending side
programmable
controller CPU
Send completion device
(Device specified with (D))
Send completion device
((D)+1 device)
Ethernet
module
Ethernet
module
Sequence scan
RECV instruction execution
request flag (*1)
Receiving side
programmable
Receive completion device
(Device specified with (D2))
controller CPU
Receive completion device
((D2)+1 device)
Receive data storage device
(Device specified with (D1))
4 - 15
(2) Instruction execution timing (for receive processing by the main
program)
(a) When normal completion
SEND (With arrival confirmation)
0
END
OFF
Data
sending
0
END
OFF
1 The RECV instruction execution request flag for Channel 3 used at the receiving
side programmable controller CPU is as listed below.
For an Ethernet module: Bit 2 of the RECV instruction execution request area
For an N/W module: SBA2 of the link special relay
0
END
0
Channel 1
Storage
complete
Channel 3
RECV
0
0
END
0
?
(address: 205) in the buffer memory
MELSEC-Q/L
END
0
END
0
END
1 scan
END
0
END
0
END
1 scan
Receive data
4 - 15

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